Mach-RT: A Many Chip Architecture for Ray Tracing
Elena Vasiou, Konstantin Shkurko, Erik Brunvand, and Cem Yuksel
In High Performance Graphics (short papers track) (HPG), 2019
Abstract
We propose an unconventional solution to high-performance ray tracing that combines a ray ordering scheme that minimizes access to the scene data with a large on-chip buffer acting as near-compute storage that is spread over multiple chips. We demonstrate the effectiveness of our approach by introducing Mach-RT (Many chip - Ray Tracing), a new hardware architecture for accelerating ray tracing. Extending the concept of dual streaming, we optimize the main memory accesses to a level that allows the same memory system to service multiple processor chips at the same time. While a multiple chip solution might seem to imply increased energy consumption as well, because of the reduced memory traffic we are able to demonstrate, performance increases while maintaining reasonable energy usage compared to academic and commercial architectures.
BibTeX
@inproceedings{Vasiou:2019:MachRT,
author = {Elena Vasiou and Konstantin Shkurko and Erik Brunvand and Cem Yuksel},
title = {Mach-RT: A Many Chip Architecture for High-Performance Ray Tracing},
booktitle = {High-Performance Graphics (HPG 2019)},
year = {2019},
location = {Strasbourg, France},
isbn = {978-3-03868-092-5},
doi = {10.2312/hpg.20191188},
issn = {2079-8687},
publisher = {The Eurographics Association},
}Acknowledgements
This material is supported in part by the National Science Foundation under Grant No. 1409129. Scene data: Fairy Forest: U. Utah, Crytek Sponza: F. Meinl at Crytek and M. Dabrovic, Dragon: Stanford CG Lab., Vegetation: S. Laine, and San Miguel: G. Leal Laguno.